In-Network-Processing: State-of-the-Art and Outlook
Date: Friday, 19 March 2021
Host: Prof. Dr.-Ing Andreas Koch and Prof. Dr. Carsten Binnig
With the ever-growing data volumes and transmission rates, In-Network Processing (INP) is becoming an attractive alternative to conventional architectures, where networking (e.g., switches, NICs) and compute operations (servers) are strictly separated. With In-Network Processing, data can be operated on while being in-transit between nodes. The efficient implementation of INP is dependent on novel high-performance computing elements specialized for these applications. Examples for this include the use of many-core CPUs in SmartNICs, but also specialized FPGA-based hardware accelerators that can keep up with the bandwidth and latency demands even for the network traffic in a many-port SmartSwitch. The workshop will examine different use-cases and architectures for a number of In-Network-Processing approaches and discuss the underlying technologies and their characteristics.